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October 2003 rev 1.0
Notebook LCD Panel EMI Reduction IC
Features

P1819
wide reduction of EMI of
down stream clock and data
FCC approved method of EMI attenuation. Provides up to 15dB EMI reduction. Generates a low EMI spread spectrum clock and a non-spread reference clock of the input frequency. Optimized for frequency range from 20 to 40MHz. Internal loop filter minimizes external components and board space. Selectable spread options: Down and Center. Low inherent cycle-to-cycle jitter. Eight spread % selections: 0.625% to -3.5%. 3.3V operating voltage range. TTL or CMOS compatible inputs and outputs. Low power CMOS design.
dependent signals. The P1819 allows significant system cost savings by reducing the number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass EMI regulations. The P1819 modulates the output of a single PLL in order to "spread" the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal's bandwidth is called `spread spectrum clock generation'. The P1819 uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method.

Supports notebook VGA and other LCD timing controller applications. Power down function for mobile application. Products available for industrial temperature range.
Available in 8-pin SOIC and TSSOP.
Product Description
The P1819 is a versatile spread spectrum frequency modulator designed specifically for input clock frequencies from 20 to 40MHz. Refer Input Frequency and Modulation Rate Table. The P1819 reduces electromagnetic interference (EMI) at the clock source, allowing system
Applications
The P1819 is targeted towards EMI management for memory and LVDS interfacesin mobile graphic chipsets and high-speed digital applications such as PC peripheral devices, consumer electronics, and embedded controller systems.
Block Diagram
D_C PD# SRS
VDD
Modulation XIN Crystal Oscillator XOUT Frequency Divider Feedback Divider REF
PLL
Phase Detector
Loop Filter
VCO
Output Divider
ModOUT
VSS
Alliance Semiconductor 2575, Augustine Drive * Santa Clara, CA * Tel: 408.855.4900 * Fax: 408.855.4999 * www.alsc.com
October 2003 rev 1.0
Pin Configuration
P1819
XIN VSS SRS ModOUT
1 2 P1819 A/B/C/D 3 4
8 7 6 5
XOUT VDD PD# REF
XIN VSS D_C ModOUT
1 2 P1819 E/F/G/H 3 4
8 7 6 5
XOUT VDD PD# REF
Pin Description
Pin# 1819A/B/C/D 1 2 3 1819E/F/G/H 1 2
Pin Name XIN VSS SRS
Type I P I
Description Connect to externally generated clock signal or crystal. Ground Connection. Connect to system ground. Spread range select. Digital logic input used to select frequency deviation. (Refer Spread Deviation Selections Table.) This pin has an internal pull-up resistor. Digital logic input used to select Down (LOW) or Center (HIGH) spread options. Refer Spread Deviation Selections Table. This pin has an internal pull-up resistor. Spread spectrum clock output. (Refer Input Frequency and Modulation Rate Selections Table and Spread Deviations Selections Table) Non-modulated reference clock output of the input frequency. Power down control pin. Pull LOW to enable PowerDown mode. This pin has an internal pull-up resistor. Connect to +3.3V. Connect to crystal. No connect if externally generated clock signal is used.
3
D_C
O
4 5 6 7 8
4 5 6 7 8
ModOUT REF PD# VDD XOUT
O O I P O
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Input Frequency and Modulation Rate Part Number P1819 Input Frequency Range 20MHz to 40MHz Output Frequency range 20MHz to 40MHz
P1819
Modulation rate Input Frequency / 512
Spread Deviation Selections Part Number P1819A SRS 0 1 0 1 0 1 0 1 NA D_C NA Spread Deviation -2.50% (DOWN) -3.50% (DOWN) -1.25% (DOWN) -1.75% (DOWN) 1.25% (CENTER) 1.75% (CENTER) 0.625% (CENTER) 0.875% (CENTER) -1.25% (DOWN) 0.625% (CENTER) -2.5% (DOWN) 1.25% (CENTER) -1.75% (DOWN) 0.875% (CENTER) -3.5% (DOWN) 1.75% (CENTER)
P1819B
NA
P1819C
NA
P1819D
NA 0 1
P1819E
P1819F
NA
0 1 0 1 0 1
P1819G
NA
P1819H
NA
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Absolute Maximum Ratings Symbol VDD , VIN TSTG TA Parameter Voltage on any pin with respect to GND Storage temperature Operating temperature Rating -0.5 to + 7.0 -65 to +125
P1819
Unit V C
0 to 70 C Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability.
DC Electrical Characteristics Symbol VIL VIH IIL IIH IXOL IXOH VOL VOH ICC IDD VDD tON ZOUT Input low voltage Input high voltage Input low current (inputs D_C, PD#, SRS) Input high current XOUT output low current @ 0.4V, VDD = 3.3V XOUT output high current @ 2.5V, VDD = 3.3V Output low voltage VDD = 3.3V, IOL = 20mA Output high voltage VDD = 3.3V, IOH = 20mA Dynamic supply current normal mode 3.3V and 25pF probe loading Static supply current standby mode Operating voltage Power up time (first locked clock cycle after power up) Clock output impedance Parameter Min GND - 0.3 2.0 -60.0 2.0 7.1 fIN - min Typ 4.5 3.3 0.18 50 Max 0.8 VDD + 0.3 -20.0 1.0 12.0 12.0 0.4 2.8 26.9 fIN - max Unit V V A A mA mA V V mA mA V mS
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AC Electrical Characteristics Symbol fIN fOUT tLH * tHL* tJC Parameter Input frequency Output frequency Output rise time Measured at 0.8V to 2.0V Output fall time Measured at 0.8V to 2.0V Jitter (cycle to cycle) Min 20 20 -200 45 Typ 0.66 0.65 50
P1819
Max 40 40 200 55
Unit MHz MHz ns ns ps %
tD Output duty cycle *tLH and tHL are measured into a capacitive load of 15pF
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Package Information
P1819
Mechanical Package Outline 8-Pin SOIC
E
H
D
A2
A
C L
e B
A 1
Symbol
Dimensions in inche s Min Max 0.071 0.010 0.069 0.020 0.01 0.202 0.164
Dimensions in millimeters Min 1.45 0.10 1.35 0.31 0.10 4.72 3.75 Max 1.80 0.25 1.75 0.51 0.25 5.12 4.15 1.27 BSC 5.70 0.30 0 6.30 0.70 8
A A1 A2 B C D E e H L e
0.057 0.004 0.053 0.012 0.004 0.186 0.148
0.050 BSC 0.224 0.012 0 0.248 0.028 8
Note: Controlling dimensions are millimeters SOIC - 0.074 grams unit weight
Low Power Mobile VGA EMI Reduction IC
D
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P1819
Mechanical Package Outline 8-Pin TSSOP
H
E D A2 A
C
e B
A1 L
Dimensions in inches Symbol A A1 A2 B C D E e H L e 0.002 0.031 0.007 0.004 0.114 0.169 Min Max 0.047 0.006 0.041 0.012 0.008 0.122 0.177
Dimensions in millimeters Min Max 1.10 0.05 0.80 0.19 0.09 2.90 4.30 0.65 BSC 6.20 0.45 0 6.60 0.75 8 0.15 1.05 0.30 0.20 3.10 4.50
0.026 BSC 0.244 0.018 0 0.260 0.030 8
Note: Controlling dimensions are millimeters TSSOP - 0.034 grams unit weight
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Ordering Codes
P1819
X 1 1.
1819 2
X 3
-08 4
XX 5
2. 3. 4. 5.
Flow Prefix: a. I = Industrial temperature range (-40C to 85C). b. P = Commercial temperature range (0C to 70C). Device Number. Deviation (%) and spread option identifier. Device pin count. Package Identifier.
Device Ordering Information
P1819A-08XX
SR - SOIC, T/R TT - TSSOP, TUBE TR - TSSOP, T/R ST - SOIC, TUBE
Pin Count
Deviation (%) and Spread option Identifier
DEVICE NUMBER
Flow: P = Commercial Temperature Range (0C to 70C) I = Industrial Temperature Range (-25C to 85C)
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Examples: Input Frequency (MHz) 20-40 20-40 20-40 20-40 Frequency Deviation (%) -2.5,-3.5 -2.5,-3.5 -2.5,-3.5 -2.5,-3.5
P1819
Part Number P1819A-08ST P1819A-08SR P1819A-08TT P1819A-08TR
Marking P1819A P1819A P1819A P1819A
Package Type 8-pin SOIC, tube 8-pin SOIC, tape & reel 8-pin TSSOP, tube 8-pin TSSOP, tape and reel
Qty / reel
Temperature (C) 0 to 70
2500
0 to 70 0 to 70
2500
0 to 70
Products are available for industrial temperature range operation. Please contact factory for more information.
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P1819
Licensed under U.S patent numbers 5,488,627 and 5,631,920
Alliance Semiconductor Corporation 2595, Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com
Copyright (c) Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: P1819 Document Version: v1.0
(c) Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.
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